Dr. Medina received the Ph.D. in Science in Electrical Engineering from the Research and Advanced Studies Center of I.P.N. in México City in 2010.
Currently, he works on the design of very low voltage and very low power analog integrated circuits; the specific lines include :
- Very low voltage design techniqes
- Very low voltage circuit applications
- Design of analog circuits for biomedical applications
- Design of analog circuits for general applications
- CMOS Floating-gate structures
- Analog circuits for energy harventing
contact: santiago.medina@cucei.udg.mx
Production:
Metodología de bajo costo para implementar circuitos electrónicos integrados, un ejemplo de aplicación.
Agustín Santiago Medina Vázquez, Marco Antonio Gurrola Navarro, Pablo David Flores Castillo, María Elena Meda Campaña, Carlos Alberto Bonilla Barragán, José Martín Villegas González
Year: 2019.
http://dx.doi.org/10.22201/fi.25940732e.2019.20n3.029
Experimental analysis of microstrip antennas using techniques to improve the bandwidth
J. Martínez Moreno ; A. S. Medina Vázquez ; C. A. Bonilla Barragán ; J. M. Arce Zavala; J. M. Villegas González
2018 IEEE 9th Latin American Symposium on Circuits & Systems (LASCAS)
Year: 2018
https://doi.org/10.1109/LASCAS.2018.8399971
A highly linear differential amplifier with tunable gain
P. D. Flores-Castillo ; A. S. Medina-Vazquez ; M. A. Gurrola-Navarro ; J. M. Villegas Gonzalez
2017 14th International Conference on Electrical Engineering, Computing Science and Automatic Control (CCE)
Year: 2017
https://doi.org/10.1109/ICEEE.2017.8108840
A technique to improve the transconductance in amplifiers
A. S. Medina-Vazquez ; Marco. A. Gurrola-Navarro ; C. A. Bonilla-Barragan ; J. M. Villegas Gonzalez
2016 13th International Conference on Electrical Engineering, Computing Science and Automatic Control (CCE)
Year: 2016
https://doi.org/10.1109/ICEEE.2016.7751233
Binary sequence correlator using a MIFGMOS
IEICE Electronics Express 13(3)
Santiago Medina-Vazquez, Marco. A. Gurrola-Navarro, José Arce-Zavala, María E. Meda-Campana
Year:2016
https://doi.org/10.1587/elex.13.20151061
Analysis of the floating-gate transistor using the charge sheet model
Agustín. S. Medina-Vazquez, Marco. A. Gurrola-Navarro, José Arce- Zavala, and María E. Meda-Campana
ISSN:1349-2543 INTERNATIONAL JOURNAL OF NUMERICAL MODELLING: ELECTRONIC NETWORKS, DEVICES AND FIELDS Int. J. Numer. Model. 2016; 29:675–685. Published online 19 November 2015 in Wiley Online Library (wileyonlinelibrary.com).
https://doi.org/10.1002/jnm.2123
Design and validation of a mixed-signal correlator using a multiple-input floating gate transistor
J. M. Arce-Zavala ; A. S. Medina-Vazquez ; M. A. Gurrola-Navarro
2015 12th International Conference on Electrical Engineering, Computing Science and Automatic Control (CCE)
Year: 2015
https://doi.org/10.1109/ICEEE.2015.7357913
Experimental analysis of a transconductor-amplifier based on a mi-fgmos transistor
N. G. Lopez-Martinez ; A. S. Medina-Vazquez ; M. A. Gurrola-Navarro
2015 12th International Conference on Electrical Engineering, Computing Science and Automatic Control (CCE)
Year: 2015
https://doi.org/10.1109/ICEEE.2015.7357911
Extracting the floating gate voltage on the multiple-input FGMOS transistor
C. Davila-Saldivar ; A. S. Medina-Vazquez ; A. Jimenez-Perez ; M. A. Gurrola-Navarro
2014 11th International Conference on Electrical Engineering, Computing Science and Automatic Control (CCE)
Year: 2014
https://doi.org/10.1109/ICEEE.2014.6978250
Using the EKV model to describe the DC operation in weak inversion of the multiple-input FGMOS transistor
Sergio Rios-Salcedo ; A. S. Medina-Vazquez ; C. Davila-Saldivar ; M. A. Gurrola-Navarro
CONIELECOMP 2013, 23rd International Conference on Electronics, Communications and Computing
Year: 2013
https://doi.org/10.1109/CONIELECOMP.2013.6525777
On-chip wavelet denoising system implemented with analogue circuits
M.A. Gurrola-Navarro ; R. Carrasco-Alvarez ; A.S. Medina-Vazquez ; G. Espinosa-Flores-Verdad
Electronics Letters
Year: 2013, Volume: 49, Issue: 9
Pages: 592 - 594
http://dx.doi.org/10.1049/el.2013.0472
EKV-based method for biasing CMOS analog cells using mUltiple-Inputs Floating Gate MOSFETs
A. S. Medina-Vázquez ; M. E. Meda-Campaña ; M. A. Gurrola-Navarro ; Edwin C. Becerra-Alvarez
2012 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)
Year: 2012
https//doi.org/10.1109/SMACD.2012.6339424
Synthesis of timed Petri net models for on-line identification of Discrete Event Systems
M. E. Meda-Campaña ; S. Medina-Vazquez
2011 9th IEEE International Conference on Control and Automation (ICCA)
Year: 2011
https://doi.org/10.1109/ICCA.2011.6137968
Voltage - Current Converter for a Memory Current Cell using Floating Gate transistors
Agustin Medina-Vazquez ; Felipe Gomez-Castaneda ; Jose A. Moreno-Cadenas ; Jesus de la Cruz-Alejo
2008 5th International Conference on Electrical Engineering, Computing Science and Automatic Control
Year: 2008